Micromanipulator Company: Analytical Probing for Professionals

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Wafer Level Testing

Wafer level tests are used to test device design and process performance. Wafer tests provide a large number of devices or test structures to obtain a statistically significant number of test results to evaluate device design and production processes. These tests have become more critical since new materials, device designs and new production processes often do not have extensive pre-production testing to determine device performance, device reliability, device lifetime, process development and new materials integration into production. Semiautomatic analytical test stations are typically used to use test engineering time efficiently.

Device characterization and modeling tests often use a wide range of tests. Common failure modes may be detected in wafer level tests through observing changes in circuit parameters, such as Drain-to-Source Saturation Current (IDSS), Gain, Output Power (POUT), Gate Leakage Current (Igate), Gate resistance (Rg) Drain resistance (Rd), Pinch-Off Voltage (Vp), Drain-to-Source Resistance (RDS), RF performance, Channel resistance (Ri), Transconductance (gm0), etc.

Typical Semiconductor Device Characterization and Modeling Tests
TestStructure/Device
Low ResistanceConductors/Interconnects/Vias, Nano-devices, Semiconductors, Superconductors, Nano-electric Devices, Resistors
High ResistanceDielectrics/Insulators, Semiconductors, Resistors
Low CurrentConductors/Interconnects/Vias, Capacitors
High Current Power Devices
Low Voltage Superconductors
High VoltagePower Devices, Capacitors
CapacitanceConductors/Interconnects/Vias, Semiconductors, Capacitors
Stress TestSemiconductors, Capacitors
I-VTransistors, Nano-electric Devices, Diodes
C-VTransistors, Nano-electric Devices

DC Parametric test

Tests: Wide range of tests to determine device electrical characteristics for resistance, voltage, and current
Instruments: Parametric analyzer femtoamp capable
Issues: Low noise probes, cables, connectors, chuck, and station

Charge trapping measurements

Tests: Voltage stress tests to determine leakage current and measure parameters between stresses
  • C-V sweep from inversion to accumulation - switching time critical
  • I-V - proper grounding and low current test setup
  • charge pumping - control and uniformity of stress pulse, consistent current measurement
Instruments: Parametric test analyzers sub-femtoamp capable, pulse generator, and high performance/low leakage switch matrix
Issues: Low current setup with low noise cables, connectors, probes and clean probe tip

C-V pulse tests - High frequency (100kHz - 100MHz) and RF (>100MHz)

Tests: Oxide thickness and performance Gate leakage
Instruments: High frequency LCR meter (compatible with DC parametric tests) and vector network analyzer (not compatible with DC parametric tests) Issues: Setup, calibration, shielded (coaxial) cabling, connectors, probes, chuck, probe tip cleanliness
Designed to reduce channel resistance, chuck noise and parasitic capacitance & inductance influences.

Reliability tests (see Reliability Testing Pages)

The most common device characterization and modeling reliability tests are
  • Negative Bias Temperature Instability (NBTI)
  • Time Dependent Dielectric Breakdown (TDDB)
These tests along with other reliability tests can provide additional information on device designs and process related defects.

Test Setup
Smaller semiconductor structures are designed to use much smaller voltages and currents and are thus more sensitive to EMI, RFI, temperature change, and power supply fluctuations.
Device sensitivities
  • Memory devices - Environmental conditions, Low current
  • Logic devices - Environmental conditions, EMI
  • Power devices - Test at field operating temperatures and voltage fluctuations
  • RF devices - Sensitive to EMI/RFI
  • Automotive sensors and control ICs - Test at field operating temperatures, EMI/RFI
General Probing System Requirements
  • Semiautomatic station capabilities to speed multiple site wafer testing
  • Station light/EMI/RFI shielding
  • Station vibration isolation
  • Low noise chucks (ambient and thermal)
  • Low noise triaxial or coaxial probes
  • Kelvin probes and chuck connections
  • Proper grounding to eliminate ground loops
  • Clean uncontaminated probe cards, probes, tips, connectors and adapters
  • Low noise cables and cable stability
Micromanipulator provides a number probing systems specifically designed for the most demanding wafer level testing. A total system approach insures that all system components are designed to provide compatibility, and to provide consistent and reliable measurement results.

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